The present invention relates to computer systems, and more particularly, to a method and apparatus of fault detection and classification (FDC) specification management.
Integrated circuits are typically fabricated by processing one or more wafers as a “lot” with a series of wafer fabrication tools (i.e., “processing tools”). Each processing tool typically performs a single wafer fabrication task on the wafers in a given lot. For example, a particular processing tool may perform layering, patterning and doping operations or thermal treatment. A layering operation typically adds a layer of a desired material to an exposed wafer surface. A patterning operation typically removes selected portions of one or more layers formed by layering. A doping operation typically incorporates dopants directly into the silicon through the wafer surface, to produce p-n junctions. A thermal treatment typically heats a wafer to achieve specific results (e.g., dopant drive-in or annealing).
Each processing tool typically performs a wafer fabrication task according to a predefined procedure (i.e., a predetermined set of steps or “recipe”). For example, a particular chemical vapor deposition (CVD) processing tool may perform a layering operation within a chamber according to a recipe which specifies temperatures and pressures within the chamber as a function of time, as well as the type and flow rate of gas introduced thereto.
A fault detection and classification (FDC) system directly monitors process parameters in order to detect conditions that may cause aberrations as they occur. Examples of process parameters are temperature, pressure, power and flow rates of process materials. A process parameter may be assigned to a processing tool to effectuate an outcome such as metal deposition, oxide growth, or source/drain implantation.
FDC systems collect and analyze process parameter data abnormalities, or faults, during operation of the processing tool. An example of a process fault is a significant drop in temperature from the temperature required to perform the particular process operation, e.g., thermal oxidation. Another example of a fault is a spike in a flow rate of a process material, such as helium. If a fault is detected, the system may have various means of reacting, such as notifying a tool operator or halting the process. SPC chart is a common techniques for tracking and analyzing manufacturing process variations. SPC has been applied to gauge the stability of a manufacturing process over time via charted SPC data (i.e., SPC charts) which document historical process performance.
When SPC data regarding one or more wafers processed through a given processing tool indicates a characteristic of the wafers affected by the processing tool has departed from an acceptable range established for the characteristic, an alarm is triggered, and the process is halted. In such a situation, a troubleshooting procedure is initiated to determine and rectify the cause of the alarm and return the processing tool to service as quickly as possible. Out of range characteristics are indicated on SPC charts, triggering numerous false alarms.
Conventionally, SPC charts are processed manually, requiring an operator to produce tens of thousands of SPC chart profiles containing requisite processing information, such as tool name, parameter name, chamber name, and/or others. The labor-intensive nature of SPC chart generation using conventional means severely hinders efficiency. Additionally, in order to reduce false alarms, numerous lower limits and/or upper limits in a series of SPC charts are manually modified, and such adjustment is time consuming. Thus, only a few parameters, about 5 to 10 per tool, can be optionally monitored by SPC charts in an attempt to reduce false alarms, hindering the ultimate goal of full process monitoring.
In view of these limitations, a need exists for an FDC specification management apparatus and method thereof that provides efficient SPC chart creation and maintenance functions, achieving the ultimate goal of full process monitoring.